1. 3G Systems
2. UMTS Services
3. UMTS Architecture
4. Core Network
5. Radio Access
6. User Equipment


1. 3G Systems

3G System ဆိုတာ Global Mobility ဆိုတဲ႔ က်ယ္ျပန္တဲ႔ Mobile နည္းပညာတစ္ခုျဖစ္ပါျပီး Telephone, Paging, Messaging, Internet နဲ႔ Broadband Data ေတြကို အေထာက္အပံ့ေပးပါတယ္ .. International Telecommunication Union (ITU) က ဒီ Mobile တတိယေျမာက္မ်ိဳးဆက္ကို စတင္ျပီး အသိအမွတ္ျပဳခဲ႔တာ ျဖစ္ပါတယ္ .. Europe Telecommunications Standards Institute (ETSI) ကေတာ႔ UMTS Standard ကို ကုိယ္စားျပဳတယ္လို႔ဆိုပါတယ္ .. ၁၉၉၈ မွာ Third Generation Partnership Project (3GPP) မွေနျပီး 3G ျဖစ္လာေအာင္ အစျပဳခဲ႔တယ္လို႔ေျပာလို႔ရပါတယ္ ..

2. UMTS Services

UMTS ဆိုတာ Universal Mobile Telecommunication System လို႔ အရွည္အဓိပၼါယ္ရပါတယ္ .. Telephone, SMS, MMS, Data Services ေတြကို တာ၀ါအျမင္႔ေတြ မလိုအပ္ပဲ Access Points တစ္ခုနဲ႔ တစ္ခုၾကားမွာ ေပးပို႔ေပးႏိုင္သလို Satellite အသံုးျပဳျပီး ေက်းလက္ေဒသ ေတြအထိပါ အသံုး ျပဳႏိုင္ပါတယ္ပါတယ္ .. Point-to-Point သို႔မဟုတ္ Point-to-Multipoint ဆက္သြယ္ေရးစ နစ္ကို အသံုးျပဳထားပါတယ္ .. အသံုးျပဳထားတဲ႔ Bearer Services ေတြမွာေတာ႔ ကြဲျပားျခားနားတဲ႔ QoS Parameters ေတြရွိပါတယ္ .. ေအာက္ပါအတိုင္း အခ်က္အလက္လႊဲေျပာင္းမႈ အျမန္ႏႈန္းအဆင္႔ေတြကို ေတာ႔ ခြဲျခားထားပါတယ္ ..

ဒါ႔အျပင္ UMTS Network ပိုင္းမွာ ကြဲျပားျခားနားတဲ႔ QoS Class ေလးခုရွိပါတယ္ ..

1. Conbersational Class (Voice, Video, Telephoney, Video Gaming)
2. Streaming Class (Multimedia, Video on Demand, Webcasting)
3. Interactive Class (Web Browsing, Network Gaming, Database Access)
4. Background Class (e-mail, SMS, Downloading)

 

4. Core Network

Core Network မွာေတာ႔ Circuit Switched နဲ႔ Packet Switched ဆိုျပီးႏွစ္ခုခြဲျခားထားပါတယ္ .. Circuit Switched အပိုင္းမွာေတာ႔ Mobile Services Switching Centre (MSC), Visitor Location Register (VLR) နဲ႔ Gateway MSC တို႔ျဖစ္ပါတယ္ .. Packet Switched အပိုင္းမွာေတာ႔ Serving GPRS Support Node (SGSN) နဲ႔ Gateway GPRS Support Node (GGSN) တုိ႔ျဖစ္ပါတယ္ .. တစ္ခ်ိဳ႕ Network Elements ေတြျဖစ္တဲ႔ EIR, HLR, VLR နဲ႔ AUC တို႕ကေတာ႔ Circuit Switched မွာေရာ Packet Switched မွာပါခြဲေ၀ သံုးစြဲၾကပါတယ္ .. Asynchronous Transfer Mode (ATM) ကေနျပီး UMTS Core Transmission အတြက္ ခြဲျခားထားပါတယ္ .. ATM Adaptation Layer Type 2 (AAL2) ကေတာ႔ Circuit Switched ဆက္သြယ္မႈေတြကို ထိန္းခ်ဳပ္ဖို႕နဲ႔ Packet Switched Connection အတြက္ AAL5 ကေတာ႔ ေဒတာေတြကို လႊဲေျပာင္းႏိုင္ဖို႕အတြက္ျဖစ္ပါတယ္ .. ဒါေပမဲ႔ Core Network တည္ေဆာက္ပံုဟာ လုပ္ေဆာင္မႈ အသစ္ေတြနဲ႔ နည္းပညာ အသစ္ေတြထပ္မံေပၚေပါက္လာရင္ေတာ႔ ေျပာင္းလဲႏိုင္ပါတယ္ ..

 

5. Radio Access

• Air Interface Transmission/ Reception
• Modulation/ Demodulation
• CDMA Physical Channel Coding
• Micro Diversity
• Error Handing
• Closed Loop Power Control စနစ္တို႔ကို ထိန္းခ်ဳပ္လုပ္ေဆာင္ေပးႏိုင္ပါတယ္ ..

• Radio Resource Control
• Admission Control
• Channel Allocation
• Power Control Settings
• Handover Control
• Macro Diversity
• Ciphering
• Segmentation/ Reassembly
• Broadcast Signaling

• International Mobile Subscriber Identity (IMSI)
• Temporary Mobile Subscriber Identity (TMSI)
• Packet Temporary Mobile Subscriber Identity (P-TMSI)
• Mobile Station ISDN (MS-ISDN)
• International Mobile Station Equipment Identity (IMEI)
• International Mobile Station Equipment Identity and Software Number (IMEISV)

• တစ္ခုေသာ User Service Identity Module (USIM) ကို အေထာက္အပံ႔ေပးပါတယ္
• တစ္ခု သို႕မဟုတ္ တစ္ခုထက္ပိုမိုတဲ႔ User Profile ေတြကို USIM မွာ ေအထာက္ အပံ႔ေပးပါတယ္ ..
• USIM ရဲ႕ Information ေတြကို ေလထဲမွ တိုးျမွင္႔ေပးႏိုင္ပါတယ္ …..
• Security functions
• User authentication
• Optional inclusion of payment methods

 

UMTS Wireless Network

The universal mobile telecommunication system (UMTS) is a 3G wireless system that delivers high-bandwidth data and voice services to mobile users. UMTS evolved from global systems for mobile communications (GSM). UMTS has an air interface based on W-CDMA and an Internet protocol core network based on general-packet radio service (GPRS). Figure 1 shows the infrastructure of a UMTS wireless network.
Figure 1. UMTS Wireless Network Infrastructure

Voice and data transport is performed by the transport layer nodes, colored blue: Node B = base transceiver station RNC = radio network controller or basestation controller (BSC) SGSN = serving GPRS support node GGSN = gateway GPRS support node MGW = media gateway

The call control function is mainly performed by the call control layer nodes, colored yellow: CSCF = call state control function MGCF = Media Gateway Control Function HSS = home subscriber server

The air interface of node B is discussed on the W-CDMA web page. The UMTS specifcations are discussed on the 3GPP web page.

Transport Layer Node Architecture

The transport layer node can be built on an asynchronous transfer mode (ATM) switch, a packet switch, or an Internet protocol router. It consists of an optional interface to call control layer nodes, host processor, adjacent node interfaces, and switch fabric. Adjacent node interfaces and switch fabric form the voice and datapath. Figure 2 shows the architecture of a generic transport layer node.
Figure 2. Transport Layer Node Architecture
 In Figure 2, the two parts implemented in programmable logic are the call control layer interface and the voice and datapath. The call control layer interface is the interface logic to call control layer nodes such as HSS, CSCF, and MGCF. The voice and datapath uses the Internet protocol to transport packet voice and data within the UMTS wireless network. Figure 3 shows a packet voice and datapath implementation.
Figure 3. Packet Voice and Datapath Functional Blocks

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The main functions of the packet voice and datapath implementation shown in Figure 3:

• Physical layer processing—The physical layer processing function processes SONET/SDH or T/E/J frame headers and extracts point-to-point protocol (PPP) packets on the receiver side. On the transmitter side, it places PPP packets into the frame payload and adds the frame header.
• Higher layer processing—The higher layer processing function performs parsing, framing, packet classification, and modification. Encryption and compression processors are usually supported and special processors are often used to accelerate the process. The queuing and traffic manager function places packets on different priority queues and drops packets according to the traffic condition.
• Switching—The switch fabric performs switching and routing functions for voice and data. It also contains a queue manager.
• Control and management—The control and management function performs path control and collects data for management purposes.

Altera and AMPP^SM IP Cores

The following intellectual property (IP) cores are available on the IP MegaStore™ website:

• SONET/SDH Framers
• T/E Framer
• PPP Packet Processor
• POS-PHY Level2/3
• ATM Cell Processor
• UTOPIA Level2/3
• DES Encryption Core
• MD5, SHA-1 Hash Functions
• SDRAM Controller

The Altera Advantage

Using Altera^® products for 3G wireless networks offers many advantages.

Time to Market

The 3G wireless network market is very competitive, which makes time to market particularly important. Using Altera FPGAs and IP cores saves vital time, since you no longer have to wait for the turnaround time necessary for ASIC development.

Flexibility

Because the migration to 3G requires multiple revisions and does not occur in one step, ASICs are not a viable platform. Altera's FPGA solution provides the flexibility to implement new proprietary features and perform remote in-field upgrades.

Embedded DSP Blocks

Stratix^® IV FPGA high-performance digital signal processing (DSP) blocks consist of hardware multipliers as well as registers, adders, subtractors, accumulators, and summation functions that are frequently required in typical DSP algorithms. The DSP block supports completely variable bit widths and various rounding and saturation modes to efficiently meet the exact requirements of your application. The DSP blocks are flexible, efficient, and optimized for a variety of DSP applications requiring high data throughput, making DSP blocks ideal for wireless communications.

Unprecedented System Bandwidth

Stratix IV high-performance devices now offer new levels of system bandwidth support, including the following:

• High-speed transceiver rates up to 8.5 Gbps
• 1,067 Mbps (533 MHz) DDR3 memory interfaces
• 550-MHz DSP performance through parallelism with optimal DSP, memory, and logic ratio
• 600-MHz TriMatrix memory blocks
• 1.6-Gbps LVDS channels
• 600-MHz core clock speeds

Nios II Embedded Processor Solutions

The Nios^® II embedded processor is based on the highly successful and revolutionary concept of embedding soft embedded core RISC processors within FPGAs. The advanced architectural features of Altera FPGAs and HardCopy^® ASICs, combined with the Nios II embedded processor, offer unparalleled processing power to meet the needs of high-bandwidth systems.

ARM Cortex-A9 MPCore Processor

Altera's SoC FPGAs integrate a dual-core ARM^® Cortex^TM-A9 MPCore^TM processor with 28-nm Cyclone^® V and Arria^® V FPGAs. The Cortex-A9 processor provides unprecedented levels of performance and power efficiency, making it an ideal solution for any design requiring high performance in a low-power, cost-sensitive, single-processor device.

Quartus II Software

When combined with Altera IP cores and the library of parameterized modules (LPM), Quartus^® II software makes the design process even faster and easier. LPM functions can be plugged into a design directly, and most can be accessed through the MegaWizard^® Plug-In Manager and customized with just a few clicks.

Cost-Reduction Path

If you implement wireless applications using Altera high-density FPGAs, you may need a low-risk cost-reduction path for high-volume production. You can migrate your designs from an FPGA to a HardCopy ASIC. For example, time-sensitive wireless applications can be prototyped and ramped up into production using Altera FPGAs, and when the design is ready for high-volume production, the design can be migrated to HardCopy ASICs, thus reducing overall costs.

Related Links

• W-CDMA
• 3G infrastructure
• Wireless solutions
• Embedded processors for Altera FPGAs
• SoC FPGA overview